The present invention relates to a technique for manufacturing a semiconductor device, the technique being preferably used for, for example, a manufacturing process of a semiconductor device having an electrodeposited electrode formed by an electrolytic plating process.
Japanese Unexamined Patent Application Publication No. 2011-105968 describes a technique in which a voltage applied to a plating solution is monitored during a step of forming a gold bump electrode by an electrolytic gold plating technique using a non-cyanide plating solution, thereby the amount of thallium added to the plating solution is detected to suppress occurrence of inferior plating such as anomalous deposition due to decrease in concentration of added thallium.